Openchip has positioned itself as a “full-stack system on chip and software innovator for AI and HPC” — a phrase that sounds deceptively simple until you unpack what it actually demands to execute. As someone who spends most of my time thinking about the architectural constraints that slow agentic systems down, that framing caught my attention immediately. Because full-stack, in this context, is not a marketing word. It is a technical commitment that very few companies can actually honor.
What Agentic AI Actually Needs From Silicon
Most public conversation about agentic AI focuses on models, prompts, and orchestration frameworks. The hardware layer gets far less attention, which is a mistake. Agentic systems — the kind that plan, reason across long contexts, call tools, and loop back on their own outputs — place a fundamentally different load on compute than a single-shot inference request does.
The memory bandwidth requirements alone are punishing. An agent running multi-step reasoning with tool calls needs to hold large context windows in fast-access memory while simultaneously managing the overhead of function execution and state tracking. Most chips designed for batch inference were never optimized for this pattern. The result is that today’s agentic deployments are often expensive, power-hungry, and architecturally awkward — running on hardware that was built for a different problem.
This is exactly the gap that a purpose-built agentic AI chip could address. And it is the gap Openchip appears to be targeting.
RISC-V as a Strategic Foundation
Openchip’s decision to build on RISC-V is worth examining closely. The open instruction set architecture has matured significantly over the past few years, and for a European startup trying to build sovereign, in-house silicon without licensing fees to ARM or dependence on US-controlled IP, it is arguably the only credible path.
From a technical standpoint, RISC-V gives Openchip the freedom to design custom extensions specifically tuned for AI and HPC workloads. That matters enormously when you are trying to optimize for the sparse, irregular memory access patterns that agentic inference generates. A general-purpose core cannot be tuned the way a custom RISC-V implementation can. The architecture is the canvas, and Openchip is painting directly on it.
What makes this particularly interesting from an architectural perspective is the HPC angle. High-performance computing and agentic AI share a common need: moving large amounts of data close to compute, fast, with minimal energy waste. If Openchip is genuinely integrating HPC design principles into its AI chip architecture, the resulting silicon could be unusually well-suited to the sustained, iterative compute that agents require — not just the peak throughput that benchmarks tend to reward.
The 2028 Timeline and What It Signals
A 2028 launch target is not a short runway. In chip development terms, it is actually fairly tight for a startup building custom silicon from scratch. Tape-out cycles, packaging, validation, software stack development, and ecosystem partnerships all have to come together in sequence. The fact that Openchip was presenting at MWC 2026 — appearing at 4YFN and Talent Arena alongside thousands of others in Barcelona — suggests the company is already deep in the build phase, not just pitching a concept.
That public presence in Europe’s tech ecosystem also signals something strategic. Openchip is not quietly building in a lab. It is cultivating relationships, recruiting talent, and establishing itself as a credible European alternative in a supply chain that is currently dominated by a very small number of players, most of them American or Taiwanese.
Why the Supply Chain Angle Matters
Reports suggest Openchip’s roadmap could affect AI computing supply chains and deployment costs globally, with a specific emphasis on lower-power solutions. From a systems architecture perspective, this is the most consequential claim in the entire story.
Power consumption is the silent constraint on agentic AI scaling. Data centers are already hitting energy limits. Enterprises deploying on-premise agents are constrained by rack power budgets. Edge deployments for agentic applications are barely viable today because the power draw is simply too high. A chip that delivers solid agentic inference performance at meaningfully lower wattage does not just reduce electricity bills — it opens deployment contexts that are currently closed.
If Openchip can deliver on that promise, the addressable market is not just cloud inference. It is every enterprise, every edge node, every embedded system that needs an agent running locally without a data center behind it.
A Measured Bet Worth Watching
I am not in the business of predicting which startups will survive the gap between a promising roadmap and a shipping product. Chip development is brutal, capital-intensive, and unforgiving of architectural missteps. But the technical logic behind Openchip’s approach is sound. The problem they are targeting is real. The timing, if they hit 2028, aligns with a market that will be hungry for exactly what they are describing.
For those of us watching the agentic AI space from the architecture side, Barcelona just became a city worth paying attention to.
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